1. Field of the Invention
This invention relates to a trench-isolation type semiconductor device and to a method of manufacturing the same.
2. Description of the Related Art
To miniaturize a semiconductor device and to improve its reliability, a trench-isolation type semiconductor device is known in which a trench is formed in the surface of a semiconductor substrate, and filled with an insulating material thereby isolating an element active region by the trench, as described, for example, in JP-A-61-61430, JP-A-61-61433, JP-A-61-168241, "Latch-Up Performance of a Sub-0.5 Micron Inter-well Deep Trench Technology" by V. Gilbert, et al, IEDM 1993, p.p. 731 to 734, and so forth.
When an N-type MOS LSI is formed by the trench-isolation system in the prior art, an oxide film having a predetermined thickness is first formed on the surface of a semiconductor substrate and a P-type impurity is then introduced into the substrate by ion implantation to form a P-type impurity injection layer below the oxide film of the surface of the semiconductor substrate.
Next, after the oxide film is removed by wet etching, the impurity injection layer is annealed at a high temperature for a predetermined time to be diffused into the substrate thereby to form a P-type impurity diffusion layer (which is referred to a "well") having an impurity concentration of up to about 10.sup.16 ions/cm.sup.3. Then, a resist pattern is formed and etching is carried out to form a trench having a predetermined pattern so as to form element forming regions isolated by the trench in the P well. Circuit elements such as N transistors, capacitors, etc, are formed in these element forming regions.
As described above, the P well is first formed and then the trench is formed. Therefore, when the well is shallower than the trench, the well disposed between adjacent element formation regions may be divided by the trench. When the impurity type of the substrate wafer is different from that of the well and the well disposed between the element formation regions is divided by the trench, a contact for forming the connection for keeping the divided wells at the same potential must be disposed in each well, involving a problem in that the area of the semiconductor device increases.
Therefore, the well is generally provided with a sufficient depth in order to prevent it from being divided by the trench. The depth of the trench is generally about 0.5 .mu.m whereas the depth of the well is 2 to 4 .mu.m. When it is required to further increase the depth of the trench, however, the well must be formed with a greater depth to prevent it from being divided by the trench. For this reason, high temperature annealing or high energy ion implantation must be carried out after ion implantation for a longer time than usual. However, these treatments involve a problem of the thermal strain resulting from high temperature heat-treatment or the crystal defect derived from higher energy, thus resulting in deterioration of the device characteristics.
According to the prior art described above, the well is first formed in the semiconductor substrate and then the trench is formed. In contrast, JP-A-1-245539 proposes a method in which the trench is first formed in the semiconductor substrate, then the trench is filled with an insulating layer and the impurity injection layer is formed by implanting an impurity into the region isolated by the trench. According to this method, the well is not divided by the trench but because the impurity is implanted after the trench is filled with the insulating film, impurity implantation energy of higher level is required. In consequence, damages occurring in the surface of the semiconductor substrate become great.